1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device which has a floating gate electrode and can write data by injecting electrons into the floating gate electrode by applying a voltage to a control gate electrode and erase the data by extracting the electrons from the floating gate electrode.
2. Description of the Prior Art
FIG. 1 is a view showing a circuit configuration of a nonvolatile semiconductor memory device in the prior art.
As shown in FIG. 1, in the nonvolatile semiconductor memory device, a plurality of memory elements are arranged in a matrix fashion to form columns and rows. Each of the memory elements consists of an insulated gate field effect transistor which has a floating gate electrode and a control gate electrode. The control gate electrodes of the memory elements in the row direction are connected to a common word line (WL). Drain diffusion regions of the memory elements in the column direction are connected to a common bit line (BL).
In writing data into the memory element, write signals are supplied to a certain word line and a certain bit line to write data into the memory element located at the intersecting point of the word line and the bit line. In contrast, in reading data from the memory element, read signals are supplied to the certain word line and the certain bit line to read the write data from the memory element located at the intersecting point of the word line and the bit line.
FIG. 2A is a plan view showing arrangement of the memory elements and wirings of the nonvolatile semiconductor memory device, which is wired as shown in FIG. 1, on the semiconductor substrate. FIG. 2B is a sectional view showing the nonvolatile semiconductor memory device, taken along a line A--A in FIG. 2A.
As shown in FIG. 2A, a plurality of memory elements are arranged in a matrix fashion. Each of the memory elements is formed of the insulated gate field effect transistor which has the floating gate electrode and the control gate electrode. A common word line (WL) 6b which is connected to the control gate electrodes of the memory elements in the row direction is formed to extend along the row direction. A common bit line (BL) 8 which is connected the drain regions of respective 3 memory elements in the column direction is formed to extend along the column direction.
As shown in FIG. 2B, each of the memory elements has a floating gate electrode (FG) 4 formed on a semiconductor substrate 1 via a tunnel insulating film 3, and a control gate electrode (CG) 6a formed on the floating gate electrode 4 via a gate insulating film 5. The control gate electrodes (CG) 6a of respective transistors are connected to each other by the common word line 6b. The common word lines 6b are formed to extend along the row direction row after row.
As shown in FIG. 2B, field insulating film 2 which acts as isolation regions to isolate respective memory elements is formed on the semiconductor substrate 1.
In the above nonvolatile semiconductor memory device, writing of data into the memory element is carried out as follows. More particularly, an electric field is applied to the semiconductor substrate 1 via the control gate electrode 6a and the floating gate electrode 4 by applying the high voltage to the word line 6b. Accordingly, hot electrons are induced in the semiconductor substrate 1 and are then injected into the floating gate electrode 4 via the tunnel insulating film 3. As a result, a threshold value is increased higher to such extent that a channel cannot be created by the normal reading voltage.
Reading of data from respective memory elements is executed as follows. That is, a voltage which is smaller than that applied when writing of data into the word line 6b is executed is applied. Accordingly, the channels are shut off as they are in the transistors into which the data have been written, but the channels can be formed in the transistors into which the data have not been written yet and then currents flowing through such channels are detected.
By the way, in the nonvolatile semiconductor memory device in the prior art, it has been requested that the data write/read should be carried out at a higher rate. Nevertheless, there has been the problem that the tunnel insulating film through which the hot electrons are passed in writing the data or erasing the data cannot be made thinner since the data being written into the memory elements must be held over the term of guarantee.
In other words, the electrons which have been injected into the floating gate electrode 4 are easier to leak as a thickness of the insulating film around the tunnel insulating film 3 and the floating gate electrode 4 is thinner. Accordingly, in order to hold the charges over the term of guarantee of the memory element, the thickness of the insulating film in the periphery of the floating gate electrode 4 cannot be so made thin. As a result, in the prior art, there has been the problem that high speed writing/reading is disturbed.